Freescale Semiconductor /MK60D10 /PDB0 /DACINTC0

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Interpret as DACINTC0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TOE 0 (0)EXT

EXT=0, TOE=0

Description

DAC Interval Trigger n Control Register

Fields

TOE

DAC Interval Trigger Enable

0 (0): DAC interval trigger disabled.

1 (1): DAC interval trigger enabled.

EXT

DAC External Trigger Input Enable

0 (0): DAC external trigger input disabled. DAC interval counter is reset and counting starts when a rising edge is detected on selected trigger input source or software trigger is selected and SWTRIG is written with 1.

1 (1): DAC external trigger input enabled. DAC interval counter is bypassed and DAC external trigger input triggers the DAC interval trigger.

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